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742 IP
651
0.118
Standard Cell PowerSlash(TM) Library IP, 8 tracks, UMC 0.11um eFlash/LL process
UMC 0.11um eFlash/LL process 8-Track Cell Library....
652
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 12 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/HVT process 12-Track POWERSLASH Cell Library (C35)....
653
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Logic process 12-Track high speed Cell POWERSLASH Library (C40)....
654
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 12 tracks, UMC 55nm LP process
UMC 55nm LP/HVT Low-K Logic process 12-Track Generic Core Cell Library....
655
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/HVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library....
656
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/HVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library with LPLUS (C38)....
657
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/HVT Logic and Mixed-Mode process 7-Track POWERSLASH Kit Cell Library C35....
658
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Low-K Logic process 7-Track POWERSLASH Cell Library....
659
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 55nm LP process
UMC 55nm LP/HVT Low-K Logic process 7-Track POWERSLASH Cell Library....
660
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 55nm SP process
UMC 55nm SP/HVT Logic process 7-Track POWERSLASH Cell Library....
661
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 8 tracks, UMC 55nm LP process
UMC 55nm LP/HVT Low-K Logic process 8-Track POWERSLASH Core Cell Library....
662
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 8 tracks, UMC 55nm SP process
UMC 55nm SP/HVT Low-K process POWERSLASH Cell Library....
663
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 9 tracks, UMC 28nm HLP process
UMC 28nm HLP/HVT Logic process 9-Track POWERSLASH Core Core Cell Library....
664
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Logic process 9-Track Standard Cell Library (POWERSLASH Core)....
665
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, UMC 65nm LL process
UMC 65nm LL/HVT Low-K Logic process POWERSLASH Core Cell Library....
666
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, UMC 65nm SP process
UMC 65nm SP/HVT process POWERSLASH Cell Library....
667
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, UMC 90nm LL process
UMC 90nm LL/HVT Low-K Logic process Cell Library POWERSLASH Core Cell Library (high density Version)....
668
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, UMC 90nm SP process
UMC 90nm SP/HVT Low-K process POWERSLASH Core Cell Library libary....
669
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 12 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/LVT process 12-Track POWERSLASH Cell Library (C35)....
670
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Logic process 12-Track high speed POWERSLASH Core Cell Library....
671
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 12 tracks, UMC 55nm LP process
UMC 55nm LP/LVT Low-K Logic process 12-Track POWERSLASH Core Cell Library....
672
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library....
673
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library with LMINUS (C30)....
674
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track POWERSLASH Generic Core Cell Library wtih LPLUS (C38)....
675
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/LVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library (C35)....
676
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Low-K Logic process 7-Track POWERSLASH Cell Library....
677
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 55nm LP process
UMC 55nm LP/LVT Low-K Logic process 7-Track POWERSLASH Core Cell Library....
678
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 8 tracks, UMC 55nm LP process
UMC 55nm LP/LVT Low-K Logic process 8-Track POWERSLASH Core Cell Library....
679
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 9 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic process 9-Track POWERSLASH standard Core Cell Library (C35)....
680
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Logic process 9-Track Standard Cell Library (POWERSLASH Core)....
681
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 12 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process 12-Track Standard POWERSLASH Core Cell Library (C35)....
682
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 12-Track high speed POWERSLASH Cell Library (C40)....
683
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 12 tracks, UMC 55nm LP process
UMC 55nm LP/RVT Low-K Logic process 12-Track POWERSLASH Core Cell Library....
684
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library....
685
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library with LMINUS (C30 RVT)....
686
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library with LPLUS (C38)....
687
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/RVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library (C35)....
688
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Low-K Logic process 7-Track POWERSLASH Cell Library....
689
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 55nm LP process
UMC 55nm LP/RVT Low-K Logic process 7-Track POWERSLASH Core Cell Library....
690
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 55nm SP process
UMC 55nm SP/RVT Logic process 7-Track POWERSLASH Cell Library....
691
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 8 tracks, UMC 55nm LP process
UMC 55nm LP/RVT Low-K Logic process 8-Track POWERSLASH Core Cell Library....
692
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 9 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process 9-Track POWERSLASH Cell Library (C35)....
693
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 9-Track Standard Cell Library (POWERSLASH Core)....
694
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, UMC 55nm SP process
UMC 55nm SP/RVT Low-K Logic process UHS Library POWERSLASH cells....
695
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, UMC 55nm SP process
UMC 55nm SP/RVT Low-K Logic process Powerlash Core Cell Library....
696
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, UMC 65nm LL process
UMC 65nm LL/RVT Low-K process Mini-Library POWERSLASHKit....
697
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, UMC 65nm SP process
UMC 65nm SP/RVT Low-K Logic process Powerlash Core Cell Library....
698
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, UMC 90nm LL process
UMC 90nm LL/RVT Low-K process Low Power POWERSLASH Core Cell Library....
699
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, UMC 90nm SP process
UMC 90nm SP/RVT Low-K process Low Power standard Cell Library....
700
0.118
Standard Cell PowerSlash(TM) Library IP, UMC 0.11um LL/FSG process
UMC 0.11um LL/FSG Logic process high density POWERSLASH Core Cell Library....
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